(a) Field of the Invention
The present invention relates to a semiconductor device such as a bipolar linear IC (integrated circuit) of a complementary configuration used for an output stage of audio equipment which requires a high dielectric withstand voltage or high output.
(b) Description of the Prior Art
Conventionally, npn and pnp transistors are combined in a bipolar IC. Vertical npn transistors and lateral pnp transistors are used according to manufacturing restrictions.
More particularly, vertical npn transistors and lateral pnp transistors are used to simplify the process for manufacturing a semiconductor device. According to this manufacturing process, the base region of the npn transistor and the emitter and collector regions of the pnp transistor can be simultaneously formed. However, only a low power can be applied to the lateral pnp transistor, as compared with that applied to the vertical npn transistor. In order to obtain a high power vertical transistor unit, a plurality of vertical transistors must be connected in parallel with each other. In addition to this disadvantage, a transition frequency f.sub.T of the npn transistor is about several hundreds of megahertz, while a transition frequency f.sub.T of the lateral pnp transistor is about several megahertz.
In view of this problem, it has been proposed to form vertical pnp transistors in an n-type epitaxial layer on a p-type substrate.
FIG. 1 is a sectional view of a bipolar linear IC having a vertical npn transistor and a vertical pnp transistor. Referring to FIG. 1, reference numeral 11 denotes a p-type substrate; 12, an n.sup.+ -type diffusion layer; 13, an n-type epitaxial layer; 14, a base diffusion layer; 15, an emitter diffusion layer; 16, a p.sup.+ -type buried layer; 17, a p-type emitter layer; and 18, an n.sup.+ -type layer.
In the vertical pnp transistor shown in FIG. 1, the n.sup.+ -type buried layer 12 contacts the p.sup.+ -type buried layer 16, so the dielectric withstand voltage is limited. As a result, the same dielectric withstand voltage as in the npn transistor cannot be obtained. The base region of the vertical pnp transistor has an impurity concentration lower than that of the collector region. The Early effect thus tends to occur. Furthermore, the base width of the vertical pnp transistor is greater than that of the vertical npn transistor. As a result, it is very difficult to obtain the same electrical characteristics as in the vertical npn transistor.